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Micrel, IIIIInc.
ULTRA PRECISION 8:1 MUX WITH INTERNAL TERMINATION AND 1:2 CML FANOUT BUFFER
Precision Edge(R) SY58037U Precision Edge(R)
SY58037U
FEATURES
Selects between 1 of 8 inputs, and provides two precision, low skew CML output copies Guaranteed AC performance over temperature and voltage: * DC to 5Gbps throughput * <450ps propagation delay IN-to-Q (VIN 300mV) * <70ps tr / tf time * <15ps skew (output-to-output) Unique, patent-pending, channel-to-channel isolation design provides superior crosstalk performance Ultra-low jitter design: * <1psRMS random jitter * <10psPP deterministic jitter * <10psPP total jitter (clock) * <0.7psRMS crosstalk-induced jitter Unique, patent-pending, input termination and VT pin accepts DC- and AC-coupled inputs (CML, PECL, LVDS) 400mV CML output swing 50 source terminated outputs minimize round-trip reflections Power supply 2.5V 5% or 3.3V 10% -40C to +85C temperature range Available in 44-pin (7mm x 7mm) MLF(R) package Precision Edge(R)
DESCRIPTION
The SY58037U is a low jitter, low skew, high-speed 8:1 multiplexer with a 1:2 differential fanout buffer optimized for precision telecom and enterprise server distribution applications. The SY58037U distributes clock frequencies from DC to 4GHz and data rates to 5Gpbs guaranteed over temperature and voltage. The SY58037U differential input includes Micrel's unique, 3-pin input termination architecture that directly interfaces to any differential signal (AC- or DC-coupled) as small as 100mV (200mVpp) without any level shifting or termination resistor networks in the signal path. The outputs are 50 source-terminated CML with extremely fast rise/fall time guaranteed to be less than 70ps. The SY58037U features a patent-pending isolation design that significantly improves channel-to-channel crosstalk performance. The SY58037U operates from a 2.5V 5% or 3.3V 10% supply and is guaranteed over the full industrial temperature range of -40C to +85C. The SY58037U is part of Micrel's high-speed, Precision Edge(R) product line. Data sheets and support documentation can be found on Micrel's web site at www.micrel.com.
APPLICATIONS
Data communication systems All SONET/SDH data/clock applications All Fibre Channel applications All Gigabit Ethernet applications
Precision Edge is a registered trademark of Micrel, Inc. MLF and MicroLeadFrame are registered trademarks of Amkor Technology, Inc. M9999-020707 hbwhelp@micrel.com or (408) 955-1690
Rev.: C Amendment: /0
1
Issue Date: February 2007
Micrel, Inc.
Precision Edge(R) SY58037U
FUNCTIONAL BLOCK DIAGRAM
IN0
50
VT0
50
/IN0 VREF-AC0 IN1
50
VT1
50
/IN1 IN2
50
VT2
50
8:1 MUX 0 1 1:2 Fanout
/IN2 VREF-AC1 IN3
50
VT3
50
2 3 4 MUX
Q0 /Q0 Q1 /Q1
S2 S1 S0
/IN3 IN4
50
VT4
50
5 6 7
/IN4 VREF-AC2 IN5
50
VT5
50
/IN5 IN6
50
VT6
50
/IN6 VREF-AC3 IN7
50
VT7
50
/IN7
SEL0 (CMOS/TTL) SEL1 (CMOS/TTL) SEL3 (CMOS/TTL)
TRUTH TABLE
SEL2 L L L L H H H H SEL1 L L H H L L H H SEL0 L H L H L H L H Q IN0 IN1 IN2 IN3 IN4 IN5 IN6 IN7 /Q /IN0 /IN1 /IN2 /IN3 /IN4 /IN5 /IN6 /IN7
M9999-020707 hbwhelp@micrel.com or (408) 955-1690
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Micrel
Precision Edge(R) SY58037U
PACKAGE/ORDERING INFORMATION
VT5 /IN5 /IN6 VT6 /IN6 VREF-AC3 IN7 VT7 /IN7 SEL2 NC
Ordering Information(1)
Part Number
33 32 31 30 29 28 27 26 25 24 23
Package Type MLF-44 MLF-44 MLF-44 MLF-44
Operating Range Industrial Industrial Industrial Industrial
Package Marking SY58037U SY58037U SY58037U with Pb-Free bar-line indicator SY58037U with Pb-Free bar-line indicator
Lead Finish Sn-Pb Sn-Pb Pb-Free NiPdAu Pb-Free NiPdAu
44 43 42 41 40 39 38 37 36 35 34
IN5 VREF-AC2 /IN4 VT4 IN4 NC /IN3 VT3 IN3 VREF-AC1 /IN2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22
GND VCC /Q1 Q1 VCC GND VCC /Q0 Q0 VCC GND
SY58037UMI SY58037UMITR(2) SY58037UMG(3) SY58037UMGTR(2, 3)
44-Pin MLF(R) (MLF-44)
PIN DESCRIPTION
Pin Number 20, 18, 16, 14, 13, 11, 9, 7, 5, 3, 1, 43, 42, 40, 38, 36 19,15, 12, 8, 4, 44, 41, 37 17, 10, 2 39 21, 22, 35 24, 27, 29, 32 25, 26, 30, 31 23, 28, 33 Pin Name IN0, /IN0, IN1, /IN1, IN2, /IN2, IN3, /IN3, IN4, /IN4, IN5,/IN5, IN6, /IN6, IN7, /IN7 VT0, VT1 VT2, VT3, VT4, VT5, VT6, VT7 VREF-AC0, VREF-AC1, VREF-AC2, VREF-AC3 SEL0, SEL1, SEL2 VCC Q0,/Q0, Q1,/Q1 GND, Exposed Pad Pin Function Differential Inputs: These input pairs are the differential signal inputs to the device. Inputs accept AC or DC-coupled signals as small as 100mV. Each pin of a pair internally terminates to a VT pin through 50. Note that these inputs will default to an indeterminate state if left open. Please refer to the "Input Interface Applications" section for more details.
VT2 IN2 /IN1 VT1 IN1 VREF-AC0 /IN0 VT0 IN0 SEL1 SEL2
Notes: 1. Contact factory for die availability. Dice are guaranteed at TA = 25C, DC electricals only. 2. Tape and Reel. 3. Pb-Free package recommended for new designs.
Input Termination Center-Tap: Each side of the differential input pair terminates to a VT pin. The VT pins provide a center-tap to a termination network for maximum interface flexibility. See "Input Interface Applications" section for more details. Reference Voltage: This output biases to VCC-1.2V. It is used when AC coupling the inputs (IN, /IN). For AC-coupled applications, connect VREF_AC to the VT pin and bypass with a 0.01F low ESR capacitor to VCC. See "Input Interface Applications" section for more details. The TTL/CMOS-compatible inputs select the inputs to the multiplexer. Note that this input is internally connected to a 25k pull-up resistor and will default to a logic HIGH state if left open. Positive Power Supply. Bypass with 0.1F0.01F low ESR capacitors as close to each VCC pin. Differential Outputs: These CML output pairs are the outputs of the device. Please refer to the truth table below for details. Unused output pairs may be left open. Each output is designed to drive 400mV into 100 across each output pair. Ground. GND and exposed pad must both be connected to the most negative potential of chip ground.
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Micrel
Precision Edge(R) SY58037U
Absolute Maximum Ratings(1)
Power Supply Voltage (VCC ) ...................... -0.5V to +4.0V Input Voltage (VIN) ......................................... -0.5V to VCC LVPECL Output Current (IOUT) Continuous ............................................................. 50mA Surge .................................................................... 100mA Termination Current(3) Source or sink current on VT pin ........................ 100mA Lead Temperature (soldering, 20 sec.) ..................... 260C Storage Temperature Range (TS ) ........... -65C to +150C
Operating Ratings(2)
Power Supply Voltage (VCC) ............... +2.375V to +2.625V ............................................................ +3.0V to +3.6V Ambient Temperature Range (TA) ............. -40C to +85C Package Thermal Resistance(4) MLF(R) (JA) Still-Air ............................................................. 24C/W MLF(R) (JB) Junction-to-board ............................................ 12C/W
DC ELECTRICAL CHARACTERISTICS(5)
TA= -40C to +85C, unless otherwise stated. Symbol VCC ICC RIN RDIFF_IN VIH VIL VIN VDIFF_IN VT_IN VREF-AC
Notes: 1. Permanent device damage may occur if ratings in the "Absolute Maximum Ratings" section are exceeded. This is a stress rating only and functional operation is not implied for conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratings conditions for extended periods may affect device reliability. 2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings. 3. Due to the limited drive capability, use for input of the same package only. 4. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the device's most negative potential on the PCB. JB uses 4-layer JA in still-air number unless otherwise stated. 5. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
Parameter Power Supply Voltage
Condition VCC = 2.5V. VCC = 3.3V. No load, max. VCC.
Min 2.375 3.0
Typ 2.5 3.3 145
Max 2.625 3.6 200 60 120 VCC VIH-0.1 1.7
Units V V mA V V V V
Power Supply Current Input Resistance (IN-to-VT) Differential Input Resistance (IN-to-/IN) Input HIGH Voltage (IN-to-/IN) Input LOW Voltage (IN-to-/IN) Input Voltage Swing (IN-to-/IN) Differential Input Voltage Swing (IN-to-/IN) IN to VT (IN-to-/IN) Output Reference Voltage
40 80 VCC-1.2 0 See Figure 1a. See Figure 1b. 0.1 0.2
50 100
1.28 VCC-1.3 VCC-1.2 VCC-1.1
V V
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Micrel
Precision Edge(R) SY58037U
CML OUTPUT DC ELECTRICAL CHARACTERISTICS(7)
VCC = 2.5V 5% or 3.3V 10%; TA= -40C to +85C; RL = 100 across each output pair, unless otherwise stated. Symbol VOH VOUT VDIFF_OUT ROUT Parameter Output HIGH Voltage Q, /Q Output Differential Swing Q, /Q Differential Output Voltage Swing Q, /Q Output Source Impedance See Figure 1a. See Figure 1b. Condition Min Typ Max VCC Units V mV mV 60 VCC-0.040 VCC-0.010 325 650 40 400 800 50
LVTTL/CMOS DC ELECTRICAL CHARACTERISTICS(7)
VCC = 2.5V 5% or 3.3V 10%; TA= -40C to +85C, unless otherwise stated. Symbol VIH VIL IIH IIL
Note: 7. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
Parameter Input HIGH Voltage Input LOW Voltage Input HIGH Current Input LOW Current
Condition
Min 2.0
Typ
Max VCC 0.8 30
Units V V A A
-125 -300
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Micrel
Precision Edge(R) SY58037U
AC ELECTRICAL CHARACTERISTICS(8)
VCC = 2.5V 5% or 3.3V 10%; TA= -40C to +85C, RL = 100 across each output pair or equivalent, unless otherwise stated. Symbol fMAX tpd Parameter Maximum Operating Frequency Differential Propagation Delay (IN-to-Q) (SEL-to-Q) tpd Tempco tSKEW Differential Propagation Delay Temperature Coefficient Output-to-Output Skew Part-to-Part Skew tJITTER Data Random Jitter (RJ) Deterministic Jitter (DJ) Clock Cycle-to-Cycle Jitter Total Jitter (TJ) Crosstalk-induced Jitter tr, tf
Notes: 8. High-frequency AC-parameters are guaranteed by design and characterization. 9. Output-to-output skew is measured between two different outputs under identical input transitions. 10. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and with no skew of the edges at the respective inputs 11. Random jitter is measured with a K28.7 character pattern, measured at fMAX. 12. Deterministic jitter is measured at 2.5Gbps/3.2Gbps, with both K28.5 and 223-1 PRBS pattern. 13. Cycle-to-cycle jitter definition: the variation of periods between adjacent cycles, Tn - Tn-1 where T is the time between rising edges of the output signal. 14. Total jitter definition: with an ideal clock input of frequency fMAX, no more than one output edge in 1012 output edges will deviate by more than the specified peak-to-peak jitter value. 15. Crosstalk is measured at the output while applying two similar differential clock frequencies that are asynchronous with respect to each other adjacent inputs.
Condition NRZ data Clock VIN 100mV
Min 5 4 240 100
Typ
Max
Units Gbps GHz
35550
450 550
ps ps fs/C
215 Note 9 Note 10 Note 11 Note 12 Note 13 Note 14 Note 15 At full output swing, 20% to 80%. 20 40 15 150 1 10 1 10 0.7 70
ps ps psRMS psPP psRMS psPP psRMS ps
Output Rise/Fall Time
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Micrel
Precision Edge(R) SY58037U
TYPICAL OPERATING CHARACTERISTICS
VCC = 3.3V, GND = 0, VIN = 100mV, TA = 25C, unless otherwise stated.
Output Amplitude vs. Frequency
900 WITHIN DEVICE SKEW (ps) OUTPUT AMPLITUDE (mV) 800 700 600 500 400 300 0 1000 2000 3000 4000 5000 FREQUENCY (MHz) 1.2 1.0 0.8 0.6 0.4 0.2
Within Device Skew vs. Temperature
365 PROPAGATION DELAY (ps) 360 355 350 345 340 335
Propagation Delay vs. Temperature
0 -40 -20
0
20
40
60
80 100
330 -40 -20
0
20
40
60
80 100
TEMPERATURE (C)
TEMPERATURE (C)
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Micrel
Precision Edge(R) SY58037U
FUNCTIONAL CHARACTERISTICS
VCC = 3.3V, GND = 0, VIN = 100mV, TA = 25C, unless otherwise stated.
1.25Gbps Output (Q - /Q)
2.5Gbps Output (Q - /Q)
Output Swing (200mV/div.)
TIME (200ps/div.)
Output Swing (200mV/div.)
TIME (100ps/div.)
5Gbps Output (Q - /Q)
200MHz Output (Q - /Q)
Output Swing (200mV/div.)
TIME (50ps/div.)
Output Swing (200mV/div.)
TIME (600ps/div.)
622MHz Output (Q - /Q)
Output Swing (200mV/div.)
TIME (100ps/div.)
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Micrel
Precision Edge(R) SY58037U
SINGLE-ENDED AND DIFFERENTIAL SWINGS
VIN, VOUT 400mV (Typ.)
VDIFF_IN, VDIFF_OUT 800mV (Typ.)
Figure 1a. Single-Ended Voltage Swing
Figure 1b. Differential Voltage Swing
INPUT AND OUTPUT STAGES
VCC
VCC
VCC
50 /Q
50
ZO = 50 100
50 /Q
50
ZO = 50
IN
Q
50 VT GND 50 /IN
Q ZO = 50 ZO = 50 100mA DC bias per application
100mA
GND
GND
Figure 2a. Simplified Differential Input Stage
Figure 2b. CML DC-Coupled (100 Termination)
Figure 2c. CML AC-Coupled (50 Termination)
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Micrel
Precision Edge(R) SY58037U
INPUT INTERFACE APPLICATIONS
VCC
VCC IN
VCC
LVPECL
IN /IN VCC SY58037U 0.01F NC VT GND VREF-AC GND 0.01F For 3.3V, Rpd = 100. For 2.5V, Rpd = 50. Rpd Rpd VCC VT VREF-AC LVPECL /IN SY58037U GND NC NC CML
IN /IN SY58037U VT VREF-AC
GND
Rpd
For VCC = 3.3V, Rpd = 50. For VCC = 2.5V, Rpd = 19.
Option: May connect VT to VCC.
Figure 3a. LVPECL Interface (DC-Coupled)
VCC
Figure 3b. LVPECL Interface (AC-Coupled)
Figure 3c. CML Interface (DC-Coupled)
VCC
IN CML /IN SY58037U GND VCC VT VREF-AC 0.01F
IN LVDS /IN SY58037U GND NC NC VT VREF-AC
Figure 3d. CML Interface (AC-Coupled)
Figure 3e. LVDS Interface
RELATED MICREL PRODUCTS AND SUPPORT DOCUMENTATION
Part Number SY58037U SY58038U SY58039U Function Ultra Precision 8:1 MUX with Internal Termination and 1:2 CML Fanout Buffer Ultra Precision 8:1 MUX with Internal Termination and 1:2 LVPECL Fanout Buffer Ultra Precision 8:1 MUX with Internal Termination and 1:2 400mV LVPECL Fanout Buffer MLF(R) Application Note HBW Solutions New Products and Applications Data Sheet Link http://www.micrel.com/product-info/products/sy58037u.shtml http://www.micrel.com/product-info/products/sy58038u.shtml http://www.micrel.com/product-info/products/sy58039u.shtml www.amkor.com/products/notes_papers/MLF_AppNote_0902.pdf www.micrel.com/product-info/products/solutions.shtml
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Micrel
Precision Edge(R) SY58037U
44-PIN MicroLeadFrame(R) (MLF-44)
Package EP- Exposed Pad
Die
CompSide Island
Heat Dissipation Heat Dissipation VEE Heavy Copper Plane VEE Heavy Copper Plane
PCB Thermal Consideration for 44-Pin MLF(R) Package (Always solder, or equivalent, the exposed pad to the PCB) Package Notes: 1. Package meets Level 2 qualification. 2. All parts are dry-packaged before shipment. 3. Exposed pads must be soldered to a ground for proper thermal management.
MICREL, INC.
TEL
2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
FAX
+ 1 (408) 944-0800
+ 1 (408) 474-1000
WEB
http://www.micrel.com
The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser's use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser's own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. (c) 2005 Micrel, Incorporated.
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